Silego被德勤認為是在硅谷發(fā)展迅猛的前50的科技公司之一。Silego開發(fā)硅芯片解決方案，以減少元件數(shù)量，功耗和成本，是在硅谷增長最快的半導體公司之一。
Silego是全球的筆記本電腦和上網(wǎng)本時鐘供應商，擁有大量的產(chǎn)品線，涵蓋DDR3寄存器集成電路，消費性產(chǎn)品，筆記本電腦和上網(wǎng)本芯片。 Silego總部位于加利福尼亞州圣克拉拉，其業(yè)務(wù)和設(shè)計中心遍及全球。Silego科技是一家私人持有的并獲得的風險投資公司支持的公司。
二、招聘職位
Job Description:
This position will participate in layout design team for analog and mixed signal circuits on CMOS process. Work through entire chip construction process, from preliminary floor planning, detailed sub-block layout, and global placement and routing. Responsible for running full verification sequence using advanced EDA tools. The responsibilities will include but not limited to:
Layout floor planning of large, mixed signal IC
Transistor level sub-block layout based on schematics provide by designers, including careful analog considerations
Verifying and completing the IC with DRC/LVS checks, chip-finishing and bonding
Delivering back-annotated data needed for timing verification of modules, both standalone and embedded in top level circuitry
Job Requirement:
BSEE or above, MSEE preferred
Be able to translate circuits schematics directly to layout
Understand IC process basics
Understand circuit basics and how they impact IC layout strategy
Very good communication skills in English and Chinese
工作地點：合肥
工作經(jīng)驗：應屆畢業(yè)生
最低學歷：本科
專業(yè)要求：微電子相關(guān)專業(yè)(應用物理 電子科學與技術(shù) 微電子學)
招聘人數(shù)：1人
薪資福利：年薪8萬左右，五險一金，雙休
三、聯(lián)系方式
聯(lián)系方式：0551-65368431，簡歷請投至 xli@silego.com
公司地址：安徽省合肥市天元路3號留學生園2號樓303
